Short Course Information
Short Course 1, Sunday 8 May 1000-1300 hours
'InP-Based Photonic Integrated Circuits', presented by Helmut Heidrich, HHI, Berlin
Fraunhofer Institute for Telecommunications, Heinrich-Hertz-Institut,
Einsteinufer 37, 10587 Berlin, Germany, tel: +49 30 31002 538, email:
Helmut Heidrich received his Dipl. Phys. and Dr.-Ing degree from Technische Universität Berlin in Physics. After 3 years work at Standard Electric Lorenz AG, Berlin he joined Heinrich-Hertz-Institute fuer Nachrichtentechnik GmbH in 1982 (since 2002: Fraunhofer Institute for Telecommunications, Heinrich Hertz Institute). For the first five years he headed a group working on integrated optics LiNbO3 devices. For nearly two decades, he has been engaged in R&D on Photonic ICs (PICs) based on InP where he was heading several national and European projects within HHI (within the national BMBF Photonik I- and II-Program; RACE I+II: CMC, COBRA, OMAN; ACTS: BLISS) on the development of complex photonic ICs e.g. heterodyne receiver, optical sweepers, bi-directional WDM-transceivers, microring laser devices, mode-locked lasers, flip-chip adapted OEICs, and photonic crystal integrated devices. Currently, he is project manager within the European Projects FUNFOX (Functional Photonic Crystal Devices for Metropolitan Optical Networks) and WAPITI (Waferbonding and Active Passive Integration Technology and Implementation) and national projects for the development optical board mountable laser-, SOA-, and photo diode array OEICs. [publications: >140, Patents: 17, fellow of Informationstechnische Gesellschaft (ITG) in Verein Deutscher Elektrotechniker (VDE)
This short course is intended for researchers, engineers as well as managers who want to get an insight in GaInAsP/InP optoelectronic and photonic IC (OEIC, PIC) development trends and potential applications. The economic success of OEICs and PICs depends strongly on their cost effectiveness and/or performance benefits within the photonic/electronic system. Taking into account the progress in monolithic InP integration technology as well as today’s approaches in planar hybrid integration concepts some guidelines for the decision of an adequate monolithic/ planar hybrid solution will be discussed.
In the first part of the course an overview on state-of-the art OEICs/PICs developments for recent and future communication applications will be given. Examples are here (C)WDM lasers, high speed photodiodes, bi-directional WDM-transceivers, mode-locked lasers, modulators, and SOA-integrated Mach-Zehnder interferometers for all-optical wavelength conversion and switching purposes. Monolithic integration concepts, tools of integration technology, physical limitations (e.g. losses, crosstalk), technological challenges (e.g. fabrication effort, IC size) will be considered.
The second part will focus on certain OEICs/PICs which are adapted for planar-hybrid implementation in an optical board concept taking into account aspects on optical field transformers and self-assembling tools.
Finally, perspectives on novel technologies (e.g. photonic crystals, microring resonators, waferbonding) and the potential of photonics embedded in Giga-scale electronics as an upcoming solution of microsystems beyond 2010 will be adressed.
Short Course 2, Sunday 8 May 1400 – 1700 hours
‘InP HBTs: Process Technologies and Integrated Circuits’, presented by Mark Rodwell, UC Santa Barbara
Mark Rodwell (B.S., University of Tennessee, Knoxville, 1980, M.S. Stanford University 1982, Ph.D. Stanford University 1988) is Professor of Electrical Engineering at the University of California, Santa Barbara. He was at AT&T Bell Laboratories, Whippany, N.J. during 1982-1984. His research focuses on high bandwidth InP bipolar transistors and monolithic analog and digital transistor circuits operating above 100 GHz. His work on GaAs Schottky-diode ICs for subpicosecond / mm-wave instrumentation was awarded the 1997 IEEE Microwave Prize and the 1998 EuMC Microwave Prize. He was elected IEEE Fellow in 2003.
InP heterojunction bipolar transistors (HBTs) have potential applications in 40-160 Gb/s optical fiber transmission, in millimeter-wave radar and communications links, and in GHz-bandwidth mixed-signal ICs for radar and similar applications. Compared to Si/SiGe, materials lattice-matched to InP offer substantially superior electrical transport parameters for realizing bipolar transistors. This advantage today is mostly offset by the inferior device scaling and inferior extrinsic parasitic reduction associated with a low-volume laboratory technology; significant markets are necessary to support development of advanced processes.
The short course will start by identifying potential applications and the transistor performance required for these. It will addresses HBT physical design, and key electrical transport parameters and parasitic elements. The influence of the HBT electrical parameters on circuit performance will then be addressed, and from this HBT scaling laws will be developed. This then leads to InP HBT technology roadmaps for development of 80 & 160 Gb/s optical fiber ICs and 300 GHz mm-wave ICs. Other issues to be addressed include epitaxial layer design, thermal design, and DC and RF characterization techniques. The short course will then discuss several fabrication processes in development which address both yield, scaling, and parasitic reduction. Finally, performance of a number of demonstration ICs will be presented.